Sr. silicon design engineer
DublinAMD
...modeling Exposure to power management techniques / UPF Experience of designing on the analog/digital boundary Knowledge of modern digital verification techniques such as UVMACADEMIC CREDENTIALS: Minimum education level / experience: BS + 4 years, MS + 3 years, PhD + 1 year #LI-PL1#LI-HybridBenefits offered are [...]
Category Engineering & Architecture